1. Field of the Invention
The present invention relates to an information processing apparatus applicable for use as a printer control unit using ROM, RAM and further a high-speed RAM incorporated in CPU.
2. Related Art
In an information processing apparatus forming an image processing unit of a page printer, as shown in FIG. 9, a program to be executed in a CPU 11 is stored in a ROM 12. When power is supplied to the information processing apparatus like this, the CPU 11 is first loaded with an initial setting program (IPL) 21 stored in the ROM 12 as shown in FIG. 10 and at Step ST1, hardware such as various interfaces (not shown) is initially set. Then jumping to the head address of a print processing program 22 of the ROM 12 is made at Step ST2 and print processing is started according to the statement of the print processing program 22 at Step ST3.
FIG. 11 shows an example of the memory space to which the ROM 12 has been allocated. The program space of a RAM 14 for use as a system memory (main memory) is allocated from an address [00000000] and the address space of the a ROM 13 for storing a font bit map data is allocated from a high-order address [1F800000] and further the address space for storing a program is allocated from an address [1FC00000]. When the CPU 11 obtains access to each of the memory addresses, a decoder 16 provided for a memory controller 15 decodes the address and supplies to each chip a chip select signal for selecting the ROM 12, the ROM 13 or the RAM 14 allocated to the address involved, so that data transfer is made between the CPU 11 and each chip.
All the address values shown in the present specification or any other one are only exceptional and cannot restrictively be interpreted.
The head address [1FC00000] allocated to the ROM 12 is made to the head address of the IPL 21 and when power is supplied, the CPU 11 interprets the command described at this address and operates to start. When the initial setting of the hardware is terminated, jumping to the head address [1FD00000] of the print processing program 22 is made and thereafter the CPU 11 operates according to the print processing program (executing program) 22.
Since the page printing printer deals with a large quantity of information, it tends to take a great deal of time necessary for interpreting the input data supplied from the personal computer on the host side and the like and translating the data into intermediate print codes and output data to be supplied to a printing mechanism. Consequently, it becomes important to improve the processing speed of the whole processing apparatus. In order to improve the processing speed, increasing the processing capacity of the CPU and improving the data transfer speed between the CPU and memories are effective. However, the ordinary ROM is accessible only at low speed and the processing speed of the whole processing apparatus is saturated with the data transfer speed with the ROM. Although CPUs offering high processing speed become available at relatively low prices in recent years, the processing speed of the whole processing apparatus is impossible to double even though the operating frequency of the CPU is rendered, for example, twice because the data transfer is needed with respect to the ROM. Consequently, though the use of a ROM offering transfer speed as high as possible is desired to build a system, such a high-speed, large-capacity ROM is absent at present and besides extremely costly. Since a ROM having a large storage capacity is required to store a program necessary for the processing of the page printer, it is actually very difficult to form a system by the use of a high-speed ROM.
The RAM can be operated at high speed in comparison with the ROM and what offers a large capacity is obtainable at relatively low prices. It may therefore be taken into consideration to copy the print processing program 22 stored into the ROM 12 in the RAM 14 and to execute the program at the time power is supplied. However, copying the print processing program 22 into the RAM 14 causes part of the RAM space used as the system memory area of the memory map 9 to be monopolized by the print processing program 22 and results in curtailing a memory capacity usable for image processing. For this reason, the data processing time necessary for color printing and high resolution printing may be prolonged.
Although the print processing program on the ROM may be considered separately usable from the print processing program copied into the RAM depending on the use condition of the RAM, different programs become necessary because there is a difference in the address on the memory space between the ROM and RAM. Consequently, two programs have to be stored in the ROM, namely, a program to be executed on the ROM and what is to be copied into the RAM and executed and this makes a large capacity ROM. Moreover, there is still a problem arising from an increase in the program development cost because two different programs need to be developed and maintained.
It is also being examined recently to employ a CPU incorporating a DRAM of about 2-3 MB together with a CPU core as a printer control system. Although the storage capacity of the DRAM incorporated in the CPU is not limited to the aforementioned, a DRAM having an extremely large storage capacity is difficult to contain in the CPU in view of the size of a CPU chip and production cost now. Notwithstanding, the processing speed can be maximized on condition that the program is copied into the DRAM incorporated in this CPU and executed because a chip-to-chip interface or the access speed of a bus for use in connecting chips is not restricted. As a result, a program can be executed at the highest speed if the program is copied into the high-speed RAM but there still remains the aforesaid address problem. Moreover, though the processing speed in a case where a working area is set in the high-speed RAM incorporated in the CPU may become higher than a case where the program is copied and executed the setting of addresses becomes complicated further and besides the processing time is prolonged. Furthermore, memories offering higher processing speed are expensive because of various reasons. Consequently, securing a sufficient memory capacity for the storage and working areas of such a program with respect to whole processing results in not only over-specification but also an increase in costs.
The present invention was made in view of the foregoing difficulties accompanying the conventional information processing apparatus. Therefore, an object of the present invention is to provide an information processing apparatus having a plurality of memories different in kinds such as ROMs and RAMs capable of executing a common executing program, capable of executing a problem on a suitable memory or setting a working area thereon.
Another object of the present invention is to provide an information processing apparatus and a method of controlling an information processing apparatus capable of improving the processing speed of the whole apparatus by optimizing the allocation of memory spaces to a RAM externally connected to a CPU or a high-speed RAM incorporated in the CPU.
It is still another object of the present invention to provide a printer offering a high printing speed using an information processing apparatus capable of performing bulk data processing such as image information by flexibly setting memory areas.
It is also a further object of the present invention to provide a method of controlling an information processing apparatus capable of executing programs by switching the programs on a plurality of memories, and a record medium stored with a program which makes the processing performable.
In an information processing apparatus having a plurality of memories different in speed according to the present invention, part of or the whole of the address of the storage area or the working area of a program out of the logical memory space of a CPU is made translatable to any one of the physical addresses of the plurality of memories, so that the plurality of memories are usable in an optimum combination that can improve processing speed. More specifically, an information processing apparatus is characterized in that it comprises a CPU, a first memory adapted to secure an storage area for storing a program executed by the CPU or the working area of the CPU, a second memory adapted to secure at least part of the storage area or the working area at a higher speed than the first memory, and address translating means capable of translating at least part of the address of the storage area or the working area out of the logical memory space of the CPU to any one of the physical addresses of the first and second memories.
In the information processing apparatus in which the first memory is a ROM which is stored with the program of the CPU and the second memory is a RAM to which the program can be transferred from the ROM, the address translating means is capable of translating the address of the program space for executing the program set in the logical memory space of the CPU to the physical address space of the ROM or the physical address of the RAM, whereby any one of the executing program on the ROM and the executing program copied or developed in the RAM is made executable in the CPU. In other words, by switching and translating the address of the program space set to the predetermined logical address to the physical addresses of the ROM and the RAM, the same executing program developed on the ROM and the RAM different in the physical address can be executed in the CPU. Consequently, the RAM space is made open by operating the CPU by means of the executing program developed on the ROM on condition that a wider RAM space utilizable as a system memory or the working area makes the processing speed higher at the time of program execution. On the other hand, the executing program is developed on the RAM to which data is transferable at high speed when the RAM space is sufficiently secured in order to improve the processing speed.
When a high-speed RAM incorporated in the CPU as the RAM to which the program is transferred exists, the use condition of the memory can be optimized so that the processing speed is improved further by allocating the working area or the storage area of the program to the high-speed RAM as the second memory under the same condition as stated above. When a program having a plurality of program modules is recorded in the ROM, moreover, it is preferred to copy the program from the ROM to the RAM on a program module basis. Since the program module copied into the RAM is prevented from being rewritten while the processing according to the program module is being executed by making the copy on the program module unit basis, the processing speed is prevented from lowering because of the overhead processing time consumed by copying.
When the first memory is the RAM connected to the CPU via an external bus and when the second memory is the high-speed RAM incorporated in the CPU, the use condition of these memories can be optimized. Since the RAM connected to the external bus and the high-speed RAM incorporated in the CPU are usable as the working areas, the use condition of the memory space for the working area can also be optimized with these working areas as the first and second memories. Particularly, a stack for retaining a register in the CPU, an input buffer for temporarily storing input data to be processed in the CPU, an output buffer for temporarily storing the output data processed in the CPU or an intermediate buffer for temporarily storing intermediate data to be processed in the CPU are working areas frequently accessed from the CPU. Therefore, high-speed processing is rendered possible by making the logical addresses of these working areas translatable to the physical addresses of the high-speed RAM as much as possible in consideration of the storage area of the program or the size of mutual working area.
The address translating means is capable of deciding the marginal space capacity of the second memory at the time of start and determining the address translating destination of the storage area or the working area of the logical memory space of the CPU and when the processing contents in the information processing apparatus are limited, the operation is easily optimized. On the other hand, the address translating means is also capable of deciding the marginal space capacity of the second memory in each job at the time of commencing the job and determining the address translating destination of the storage area or the working area of the logical memory space of the CPU and this makes an information processing apparatus fit for use in performing different kinds of processing since the memory allocation is changeable on a job unit basis.
The following steps and processing are preferably followed prior to the execution of processing in the CPU for the purpose of making optimum the allocation of the RAM space to the program area or the system memory area, which results in improving the processing speed:
1. the step of checking and deciding the marginal space capacity of the second memory;
2. the step of setting at least part of the address of the storage area or the working area out of the logical memory space of the CPU in either of the physical addresses of the first and second memories, the step of setting the address including the step of setting the address of the storage area or the working area of the logical memory space of the CPU in the physical address of the first memory when the marginal space capacity of the second memory is decided to be insufficient (first step); and
3. the step of setting the address of the storage area or the working area of the logical memory space of the CPU in the physical address allocated to the storage area or the working area of the second memory when the marginal space capacity of the second memory is decided to be sufficient (second step).
The program provided with commands for dealing with these kinds of processing may be offered by recording them on a record medium such as a ROM, a ROM module or a floppy disk which is made readable by the CPU and loading the CPU with them at suitable timing.
The checking of the RAM capacity is carried out in consideration of the installation and use environment of the RAM when the information processing apparatus is started and the address translating destination of the program space may be determined on the basis of the result determined. Furthermore, the address translating destination of the program space may also be determined in consideration of the use condition of the RAM in the job at the time of commencing each job. In the case of a printer, the use condition of the RAM in the then job may be determined on the basis of the job control command transmitted from the host side at the head of each jog.
The control of the logical address translating destination of the CPU may be realized by the use of the address decoding function of a memory controller capable of controlling access to the ROM and the RAM. Furthermore, a memory management unit (MMU) of the CPU such as a TLB (Translation Lookaside Buffer) may be used as the address translating means.
The information processing apparatus according to the present invention is fit for use as an image processing unit required for processing a large quantity of data by translating input data to output data for image forming and executing an image processing program that can be output in order to store a RAM with the output data or intermediate data thus translated in an CPU because the storage capacity of the RAM is distributed in an optimum mode as system and program memories. The adoption of the image processing unit for the provision of a printing mechanism for performing the print processing based on the output data makes it possible to provide a printer offering high printing speed necessary for color printing and high-resolution printing.